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74 Commits
Author SHA1 Message Date
Brandon Ibach a7042687c1 [spi] fix SPI interface selection on ESP32-S2 and -S3 (#10732) (#10766) 2025-09-28 10:58:42 +00:00
J. Nick Koston d1276dc6df [core] Replace magic coroutine priority numbers with self-documenting CoroPriority enum (#10518) 2025-09-02 21:41:50 +00:00
J. Nick Koston b7ce8c116b [core] Centralize component setup logging to reduce flash usage (#9885) 2025-07-25 19:27:03 +00:00
J. Nick Koston ffebd30033 [ruff] Enable SIM rules and fix code simplification violations (#9872) 2025-07-25 18:26:08 +12:00
Clyde StubbsJ. Nick KostonKeith Burzinski
 		6486147da1 [mipi_spi] Template code, partial buffer support (#9314) 
Co-authored-by: J. Nick Koston <nick@koston.org>
Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
 2025-07-16 11:05:27 +10:00
J. Nick Koston 440de12e3f Don't compile unnecessary platform files (e.g. ESP8266 files on ESP32) (#9354) 2025-07-08 09:04:41 +12:00
Clyde Stubbs 169db9cc0a [spi] Enable >6 devices with ESP-IDF (#9128) 2025-06-21 07:55:08 +10:00
Clyde Stubbs 738ad8e9d3 [spi] Cater for non-word-aligned buffers on esp8266 (#9108) 2025-06-17 02:30:09 +00:00
Clyde Stubbs a488c8cd5c [spi] Restrict octal spi to S3/S2/P4 (#9041) 2025-06-11 19:45:26 +10:00
Keith Burzinski d4cea84b1b [spi] Remove redundant "SPI" from log messages (#8970) 2025-06-03 21:39:21 +01:00
Clyde StubbsandJesse Hills 183659f527 [mipi_spi] New display driver for MIPI DBI devices (#8383) 
Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com>
 2025-05-14 09:22:58 +12:00
tomaszduda23andKeith Burzinski 7c0546c9f0 [clang] clang tidy support with zephyr (#8352) 
Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
 2025-05-12 23:36:34 +00:00
Clyde Stubbs a866370a2e [spi] Implement octal mode (#8386) 2025-04-09 11:07:59 +12:00
Djordje MandicandKeith Burzinski 5108b9a8b7 Make get_flags() in GPIOPin mandatory (#8182) 
Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
 2025-02-03 11:14:55 -06:00
Olliver Schinagl dee1d84979 [spi] Fix data type in bitbash transfer_() (#8125) 2025-01-22 23:41:55 +00:00
Clyde Stubbs dac9768f6a [spi] Restore `SPIDelegateDummy` (#8019) 2025-01-15 13:56:52 +13:00
tomaszduda23 731fb1d172 [spi] relay on KEY_TARGET_PLATFORM as the other platforms does (#8066) 2025-01-13 11:15:39 +13:00
Clyde Stubbs 5bb4d042e4 [spi_device] rename mode to spi_mode (#7724) 2024-11-05 18:54:47 -06:00
Jesse Hills ddd8027238 [spi] Remove `SPIDelegateDummy` (#7215) 2024-08-07 06:33:12 +00:00
Clyde Stubbs d0ced3471e SPI: Make some validation failures give more useful messages. (#6413) 2024-03-21 16:25:11 +13:00
Clyde Stubbs dbf50381f1 SPI: Revert clk_pin to standard output pin schema (#6368) 2024-03-14 15:42:54 +13:00
Clyde Stubbs 782d662c20 SPI schema now uses typed_schema with type key (#6353) 2024-03-12 15:50:24 +13:00
Keith Burzinski 4a54af0d57 Fix RP2040 SPI pin validation (#6277) 2024-02-24 00:31:20 -06:00
Clyde StubbsandJesse Hills 1fef769496 Add quad spi features (#5925) 
Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com>
 2024-01-19 11:42:17 +09:00
Clyde Stubbs 2e6d01ddff Implement variable length single word SPI writes. (#5678) 2023-11-27 09:54:12 +13:00
DAVe3283andJesse Hills e0cee472c3 Fix compile with latest esp-idf on esp32c6 (#5677) 
Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com>
 2023-11-05 23:13:01 +00:00
Jesse Hills 46be886ca6 Use platform consts (#5508) 2023-10-09 16:54:15 -05:00
Angel Nunez Mencias aba3cd557a add USE_SPI define (#5500) 2023-10-08 21:01:26 +00:00
Clyde Stubbs b6d5cb4142 St7789v and SPI data rate (#5472) 2023-10-04 15:18:33 -05:00
Clyde Stubbs 205f41509b Support RP2040 hardware SPI (#5466) 2023-10-03 10:24:20 +13:00
Angel Nunez Mencias 0b5a57ead4 Fix SPI support for second bus on 2023.9.1 (#5456) 2023-09-29 23:34:56 +00:00
Clyde Stubbs 507dc5f496 SPI fixes for buggy components (#5446) 2023-09-29 00:36:31 +00:00
Clyde Stubbs 518ecb4cc4 Fix SPI inverted clock on ESP8266 (#5416) 2023-09-21 21:15:50 -07:00
Clyde StubbsandKeith Burzinski 5c26f95a4b Refactor SPI code; Add ESP-IDF hardware support (#5311) 
* Checkpoint

* Checkpoint

* Checkpoint

* Revert hal change

* Checkpoint

* Checkpoint

* Checkpoint

* Checkpoint

* ESP-IDF working

* clang-format

* use bus_list

* Add spi_device; fix 16 bit transfer.

* Enable multi_conf;
Fix LSB 16 bit transactions

* Formatting fixes

* Clang-format, codeowners

* Add test

* Formatting

* clang tidy

* clang-format

* clang-tidy

* clang-format

* Checkpoint

* Checkpoint

* Checkpoint

* Revert hal change

* Checkpoint

* Checkpoint

* Checkpoint

* Checkpoint

* ESP-IDF working

* clang-format

* use bus_list

* Add spi_device; fix 16 bit transfer.

* Enable multi_conf;
Fix LSB 16 bit transactions

* Formatting fixes

* Clang-format, codeowners

* Add test

* Formatting

* clang tidy

* clang-format

* clang-tidy

* clang-format

* Clang-tidy

* Clang-format

* clang-tidy

* clang-tidy

* Fix ESP8266

* RP2040

* RP2040

* Avoid use of spi1 as id

* Refactor SPI code.
Add support for ESP-IDF hardware SPI

* Force SW only for RP2040

* Break up large transfers

* Add interface: option for spi.
validate pins in python.

* Can't use match/case with Python 3.9.
Check for inverted pins.

* Work around target_platform issue with

* Remove debug code

* Optimize write_array16

* Show errors in hex

* Only one spi on ESP32Cx variants

* Ensure bus is claimed before asserting /CS.

* Check on init/deinit

* Allow maximum rate write only SPI on GPIO MUXed pins.

* Clang-format

* Clang-tidy

* Fix issue with reads.

* Finger trouble...

* Make comment about missing SPI on Cx variants

* Pacify CI clang-format. Did not complain locally??

* Restore 8266 to its former SPI glory

* Fix per clang-format

* Move validation and choice of SPI into Python code.

* Add test for interface: config

* Fix issues found on self-review.

---------

Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
 2023-09-08 02:27:19 -05:00
Kuba SzczodrzyńskiSam NeirinckDavid BuezasStroe Andrei CatalinSam NeirinckPéter SárköziHajo Noerenberg
 		a9630ac847 Support for LibreTiny platform (RTL8710, BK7231 & other modules) (#3509) 
Co-authored-by: Kuba Szczodrzyński <kuba@szczodrzynski.pl>
Co-authored-by: Sam Neirinck <git@samneirinck.com>
Co-authored-by: David Buezas <dbuezas@users.noreply.github.com>
Co-authored-by: Stroe Andrei Catalin <catalin2402@gmail.com>
Co-authored-by: Sam Neirinck <github@samneirinck.be>
Co-authored-by: Péter Sárközi <xmisterhu@gmail.com>
Co-authored-by: Hajo Noerenberg <hn@users.noreply.github.com>
 2023-09-05 10:16:08 +12:00
AustinandStijn Tintel fe7893d1b3 Support for ESP32-C2 & ESP32-C6 (#4377) 
Co-authored-by: Stijn Tintel <stijn@linux-ipv6.be>
 2023-08-21 09:42:03 +12:00
Clyde Stubbs bfdcfa4766 Align SPI data rates in C++ code with Python (#5284) 2023-08-21 08:57:02 +12:00
FabianandYour Name a326dcaf0e [ili9xxx] Allow config of spi data rate. (#4701) 
* Allow 80MHz ili9xxx display.

* python foo.

* update based on feedback.

* Change python

---------

Co-authored-by: Your Name <you@example.com>
 2023-07-05 02:53:14 -05:00
Jesse Hills d4099d68a7 Use HW SPI for rp2040 (#4955) 2023-06-19 07:24:44 +12:00
Keith Burzinski 3d7d689040 Fix ESP32 SPI hardware assignment in Arduino fw (#4669) 2023-04-12 01:38:41 +00:00
Witold Krecicki a8bb2a42a1 Add an option to force SPI into software mode, useful when (#4556) 
reusing pins for different purposes.
 2023-03-15 22:21:25 +00:00
Jesse Hills bf4d3df906 Fix RP2040 SPISettings (#3960) 2022-10-28 12:33:15 +13:00
Jesse HillsandPaulus Schoutsen 6153bcc6ad Initial Support for RP2040 platform (#3284) 
Co-authored-by: Paulus Schoutsen <balloob@gmail.com>
 2022-10-20 16:50:39 +13:00
Jesse Hills 6ef93452f5 Revert "fix spi timing issues" (#3838) 2022-09-22 07:38:31 +12:00
Ignacio Hernandez-Ros f1e8cc2cf0 fix spi timing issues (#3763) 2022-09-14 16:53:51 +12:00
Keith Burzinski ac3cdf487f Fix SPI HW selection for ESP32 variants (#3728) 2022-08-19 07:55:10 +12:00
Jesse Hills 8236e840a7 Fix spi transfer with miso pin defined on espidf (#3450) 2022-05-09 19:24:27 +12:00
Oxan van LeeuwenandJesse Hills 80d03a631e Force braces around multi-line statements (#3094) 
Co-authored-by: Jesse Hills <3060199+jesserockz@users.noreply.github.com>
 2022-01-25 08:56:36 +13:00
Oxan van Leeuwen 607601b3a4 Enable a bunch of clang-tidy checks (#2149) 2021-12-02 09:03:51 +13:00
Keith Burzinski 556d071e7f Fix 8266 SPI Clock Polarity Setting (#2836) 2021-11-30 19:30:45 +13:00